Please use this identifier to cite or link to this item:
Title: Nano-CMOS spice level implementation of different modules for direct digital frequency synthesis application
Authors: Hassan Muhuyuddin
Faisal Yaseen
Moazam Ali Khan
Ramsha Ayub
Keywords: BS Thesis
Electrical Engineering
Issue Date: Jul-2014
Publisher: University of Management and Technology
Abstract: In this project we are implementing a ROM Less Direct Digital Frequency Synthesizer (DDFS).Direct Digital Frequency Synthesizer (DDFS) generates sinusoidal signals with desired controllable frequency. Most of the times sinusoidal information stored in the ROM . All ROM based solutions suffer from ROM intrinsic drawbacks, namely low speed, large area and high power consumption. Polynomial interpolation is used to eliminate the ROM in DDFS. Chebyshev fourth order polynomial is used to approximate the first quarter of cosine signal. The DDFS is implemented using Nano Cmos BSIM3 Model on LtSpice software and also implemented on Xilinx Vertex-II FPGA.
Appears in Collections:Department of Electrical Engineering

Files in This Item:
File Description SizeFormat 
Summary.pdf104.91 kBAdobe PDFView/Open
For Full text.htm22.2 kBHTMLView/Open

Items in DSpace are protected by copyright, with all rights reserved, unless otherwise indicated.